Renesas Electronics /R7FA6M3AH /USBHS /SOFCFG

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Interpret as SOFCFG

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)EDGESTS 0 (0)INTL 0 (0)BRDYM 0 (0)TRNENSEL

EDGESTS=0, BRDYM=0, INTL=0, TRNENSEL=0

Description

SOF Pin Configuration Register

Fields

EDGESTS

Interrupt Edge Processing Status Monitor

0 (0): Interrupt edge processing is not run

1 (1): Interrupt edge processing is running

INTL

Interrupt Output Sense Select

0 (0): Edge sense

1 (1): Level sense

BRDYM

PIPEBRDY Interrupt Status Clear Timing.This bit can be set only in the initial setting (before communications).The setting cannot be changed once communication starts.

0 (0): Software clears the status.

1 (1): Hardware clears the status when data has been read from the FIFO buffer or data has been written to the FIFO buffer.

TRNENSEL

Transaction-Enabled Time Select.The transfer efficiency can be improved by setting this bit to 1 if no low-speed device is connected directly or via FS-HUB to the USB port.

0 (0): For non-low-speed communication

1 (1): For low-speed communication

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